Winter 2018 - ECE3710: Computer Hardware Design

• Syllabus (this course was later re-coded as ECE4710)
• For background on Digital Logic Design, see Fall 2017 - Digital Logic Design Class
• For VHDL material, see Tutorial: VHDL for FPGAs
• Useful links:
  • VHDL examples for Nexys-3 Board: VHDL Workshop
  • Prof. Hanna's book: Introduction to Digital Design Using Digilent FPGA Boards - Block Diagram/VHDL Examples

LABORATORY

• Hardware:
  • Nexys^TM-4 DDR Artix-7 FPGA Board (which houses the XC7A100T-1CSG324 Artix-7 FPGA) - Legacy Board
  • Nexys-4 DDR Schematics
  • Nexys-4 DDR Reference Manual
  • Nexys-4 DDR Master XDC file for Vivado Designs


• Software: Xilinx Vivado HL Webpack Edition: Download

Laboratory Assignments

• Laboratory 1   mydebouncer.vhd   my_genpulse_sclr.vhd
• Laboratory 2   mybarrelshifter.vhd   myLZD.vhd
• Laboratory 3   accelerom.zip   (ADXL362 datasheet)
• Laboratory 4   in_RAMgen.vhd   myinival.txt   fsm_sclk.vhd   my_genpulse_sclr.vhd
• Laboratory 5   mybarrelshifter.vhd   in_benchR.txt   in_benchV.txt
• Laboratory 6   lab6files.zip

FINAL PROJECT

• Guidelines
• Report Template

List of Projects

• Proximity Sensor Game: Report   Presentation
• PWM LED Control: Report   Presentation
• Melody Generator: Report   Presentation
• Microprocessor - Dice Game: Report   Presentation
• Piano with keyboard and accelerometer: Report   Presentation

Reconfigurable Computing Research Laboratory (RECRLab), Electrical and Computer Engineering Department, Oakland University