Unit 1: Introduction to Vivado

• Tutorial
• Step-by-step video: Synthesis, simulation, I/O assignment, and test on ZYBO Board
  • Sequential Multiplier 2x2

Vivado Project (VHDL files, testbench, and XDC file):

• BCD Up/Down Counter with rate control: (Project)
• Sequential Multiplier 2x2: (Project)

Unit 2: Introduction to Hardware/Software Design

• Tutorial
• Video (narrated tutorial):
  • First HW/SW Design: PS + PL (AXI GPIO) (ZYBO Z7-10)

Vivado/SDK Project (XDC, XML, and .c files):

• Definition files:
  • Board definition files (ZYBO Z7-10, ZYBO, etc) to install in Vivado: (.zip)
    Installation steps (go to "Installing Digilent Board Files")
  • ZYBO definition file for configuring the Zynq PS (old method): (ZYBO_zynq_def.xml)
• XDC files: (ZYBO Master File) (ZYBO Z7-10 Master File)
• Tutorial .c file: (.c)

Unit 3: AXI4-Lite: Custom Peripheral

• Tutorial
• Videos (narrated tutorial):
  • Pixel Processor: Hardware Integration + SW Testing (ZYBO Z7-10)
  • Pipelined 2D Convolution: Hardware Integration + SW Testing (ZYBO Z7-10)

Vivado/SDK Project files (.vhd, .c, and .txt files): Includes AXI4-Lite testbench

• Pixel Processor project: (.zip)
• Pipelined Divider project: (.zip)
• Pipelined 2D Convolution Kernel project: (.zip)

Unit 4: AXI4-Full: Custom Peripheral

• Tutorial
• Videos (narrated tutorial):
  • Pixel Processor: Hardware Integration + SW Testing (ZYBO Z7-10)
  • Pipelined 2D Convolution: Hardware Integration + SW Testing (ZYBO Z7-10)

Vivado/SDK Projects (.vhd, .c, and .txt files): Includes AXI4-Full testbench

• Pixel Processor (Full AXI) project: (.zip)
• Pipelined Divider (Full AXI) project: (.zip)
• Pipelined 2D Convolution Kernel (Full AXI) project: (.zip)
• 2-D DCT (Full AXI) project: (.zip)

Unit 5: SD Card

• Tutorial
• Video (narrated tutorial):
  • SD card write/read on AXI4-Full Pixel Processor Peripheral (ZYBO Z7-10)

SDK Project files (.c, .h) and MATLAB script:

• Files: (.zip)

Unit 6: Dynamic Partial Reconfiguration - Only PL using JTAG

• Tutorial
• (Xilinx) UG909: Vivado Design Suite User Guide - Partial Reconfiguration
• (Xilinx) UG947: Vivado Design Suite Tutorial - Partial Reconfiguration - Xilinx example project files: (.zip)
• Video (narrated tutorial):
  • 4-bit LED Pattern Controller (1 RP): PL-only project (ZYBO Z7-10)

PR Projects (VHDL files, .xdc file, TCL files):

• 4-bit LED Pattern controller (1 RP): (.zip) (I/O and clocking constraints: ZYBO Board)
• 4-bit LED Pattern controller (2 RPs): (.zip) (I/O and clocking constraints: ZYBO Board)
  * .xdc file for designs on ZYBO Z7-10.

Unit 7: Dynamic Partial Reconfiguration - PS+PL system using PCAP

• Tutorial
• Videos (narrated tutorial):
  • Pixel Processor: Tcl-based PR Flow + SW Testing (ZYBO Z7-10)
  • DCT 2D: Tcl-based flow PR Flow + SW Testing (ZYBO Z7-10)

PR Projects (VHDL files, .xdc files, TCL files, .c files):

• Pixel Processor (1 RP, vary function): (.zip)
• DCT 2D (1 RP, vary Transform size): (.zip)

Unit 8: Using DMA

• Tutorial
• Xilinx Example for DMA with Interrupts: (xdmaps_example_w_intr.c)
• Video (narrated tutorial):
  • DMA Transfers with AXI4-Full Pixel Processor Peripheral (ZYBO Z7-10)

SDK Project files (.c):

• Pixel Processor: DMA Transfers with no Interrupts: (pix_dma.c)
• Pixel Processor: DMA Transfer with Interrupts: (pix_dma_intr.c)

Unit 9: Using PL Interrupts

• Tutorial
• Video (narrated tutorial):
  • AXI4-Full Pixel Processor Peripheral w/ Interrupt: HW Integration + SW Testing (ZYBO Z7-10)

Vivado/SDK Projects (.vhd, .c, and .txt files)::

• Pixel Processor with Interrupt output(AXI4-Full) project: (.zip)