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Embedded Systems

Embedded Systems Programs

Program Details

  • REF:ES-1
  • PROGRAM:AutoSAR
  • Price: Fast Track: $595 Workshop: $1149 Module: $2495
  • Pre-Register

Program Overview

This module will introduce participants to architecting and implementing embedded software using AUTOSAR Classic, MATLAB, and Simulink. Topics include communications including CAN, single- and multi-core architectures, memory partitioning, scheduling, interrupts, and debugging. Hypervisor, profiling, virtual simulation, and testing will also be discussed. Participants will complete hands-on exercises in embedded software development.

Program Types

Objectives

  1. Describe AutoSAR methodology, platform architecture, and BSW
  2. Discuss cybersecurity and functional safety in AutoSAR
  3. Explain Application Design with AutoSAR Classic
  4. Describe the difference between AutoSAR Classic and Adaptive
  5. Explain the difference between SIL and HIL testing
  6. Explain the difference between top-down and bottom-up design
  7. Describe the DSpace AutoSAR tool chain for design, implementation, simulation, and testing software
  8. Explain how to design an embedded system using AutoSAR in DSpace SystemDesk

Schedule

Start Date End Date Days Times
10/8/24 10/10/24 T W R 7:00a - 9:40a
10/12/24 10/12/24 Saturday 9:00a - 5:00p
11/16/24 11/16/24 Saturday 9:00a - 5:00p

Objectives

  1. Describe AutoSAR methodology, platform architecture, and BSW
  2. Discuss cybersecurity and functional safety in AutoSAR
  3. Explain Application Design with AutoSAR Classic
  4. Describe the difference between AutoSAR Classic and Adaptive
  5. Explain the difference between SIL and HIL testing
  6. Explain the difference between top-down and bottom-up design
  7. Describe the DSpace AutoSAR tool chain for design, implementation, simulation, and testing software
  8. Design an embedded system using AutoSAR in DSpace SystemDesk
  9. Design and test embedded software using MATLAB and Simulink
  10. Generate embedded code from system models using MATLAB Embedded Coder
  11. Describe CAN communications

Schedule

Start Date End Date Days Times
10/8/24 10/17/24 T W R 7:00a - 9:40a
10/8/24 10/17/24 T W R 3:00p - 5:40p
11/9/24 11/18/24 T W R 7:00p - 9:40p

Objectives

  1. Describe AutoSAR methodology, platform architecture, and BSW
  2. Discuss cybersecurity and functional safety in AutoSAR
  3. Explain Application Design with AutoSAR Classic
  4. Describe the difference between AutoSAR Classic and Adaptive
  5. Explain the difference between SIL and HIL testing
  6. Explain the difference between top-down and bottom-up design
  7. Describe the DSpace AutoSAR tool chain for design, implementation, simulation, and testing software
  8. Design an embedded system using AutoSAR in DSpace SystemDesk
  9. Design and test embedded software using MATLAB and Simulink
  10. Generate embedded code from system models using MATLAB Embedded Coder
  11. Describe CAN communications
  12. Develop test benches in DSpace ControlDesk
  13. Simulate an embedded system using DSpace VEOS
  14. Design and simulate multi-component systems using DSpace tools and AutoSAR
  15. Design systems that use polling, events, and multiple ECUs
  16. Monitor communication busses, such as the CAN bus

Schedule

Start Date End Date Days Times
10/8/24 11/7/24 T W R 7:00a - 9:40a

Program Details

  • REF:ES-2
  • PROGRAM:Intro to Digital Design using FPGAs
  • Price: Fast Track: $595 Workshop: $1149 Module: $2495
  • Pre-Register

Program Overview

This module provides an introduction to designing and implementing digital hardware using VHDL targeting an FPGA. This includes simulation, programming the FPGA, and testing hardware. Evaluating digital system efficiency in terms of execution speed, power, and space required is discussed. Techniques for physical testing using integrated logic analyzers will be presented.

Program Types

Objectives

  1. Describe binary and hex number systems
  2. Explain basic combinational circuits
  3. Explain basic sequential circuits
  4. Explain the difference between special-purpose digital circuits and a general purpose digital architecture
  5. Describe the toolchain for implementing, simulating, and programming digital hardware in a Xilinx/AMD FPGA

Schedule

Start Date End Date Days Times
10/19/24 10/19/24 Saturday 9:00a - 5:00p
11/12/24 11/4/24 T W R 7:00a - 9:40a
11/23/24 11/23/24 Saturday 9:00a - 5:00p

Objectives

  1. Describe binary and hex number systems
  2. Design basic combinational circuits
  3. Design basic sequential circuits
  4. Explain the difference between special-purpose digital circuits and a general purpose digital architecture
  5. Describe the toolchain for implementing, simulating, and programming digital hardware in a Xilinx/AMD FPGA
  6. Implement digital circuits in VHDL using FPGAs
  7. Write a testbench to simulate digital circuits
  8. Simulate digital circuits using Vivado ModelSim
  9. Implement digital circuits using an FPGA

Schedule

Start Date End Date Days Times
11/5/24 11/14/24 T W R 3:00p - 5:40p
11/12/24 11/21/24 T W R 7:00a - 9:40a
12/3/24 12/12/24 T W R 7:00p - 9:40p

Objectives

  1. Describe binary and hex number systems
  2. Design intermediate combinational circuits
  3. Design intermeditate sequential circuits
  4. Explain the difference between special-purpose digital circuits and a general purpose digital architecture
  5. Describe the toolchain for implementing, simulating, and programming digital hardware in a Xilinx/AMD FPGA
  6. Implement digital systems in VHDL using FPGAs
  7. Write a testbench to simulate digital systems
  8. Simulate digital circuits using Vivado ModelSim
  9. Implement digital systems using an FPGA
  10. Benchmark performance between design techniques for special-purpose hardware
  11. Optimize control units and data paths for increasing speed and reducing space in FPGAs
  12. Test FPGA-based hardware using Integrated Logic Analyzers (ILAs)

Schedule

Start Date End Date Days Times
11/12/24 12/19/24 T W R 7:00a - 9:40a

Program Details

  • REF:ES-7
  • PROGRAM:Introduction to Vector PreVision
  • Price: Fast Track: $595 Workshop: $1149 Module: $2495
  • Pre-Register

Program Overview

This workshop offers a comprehensive exploration of Vector PREEvision, focusing on E/E architecture design in the automotive industry. Participants will start with the basics, including installation, user interface navigation, and project management, before progressing to detailed architecture design and network topology creation. The workshop covers variant management, safety and security concepts, and an introduction to AUTOSAR within PREEvision. Advanced topics like custom reporting, scripting, and tool integration will be explored to enhance workflow efficiency. Real-world case studies and hands-on exercises will provide practical experience, culminating in group projects and final presentations. Ideal for professionals seeking to deepen their expertise, this workshop equips participants with the skills needed to tackle complex design challenges.

Program Types

Objectives

  1. Install, set up, and navigate the Vector PREEvision software, including understanding its user interface and overall capabilities.
  2. Create and manage projects within PREEvision, effectively handling requirements and utilizing basic modeling techniques, including an introduction to UML/SysML diagrams.
  3. Design basic E/E architectures, create function networks, and develop simple communication designs using PREEvision.
  4. Run basic analyses within PREEvision and generate, export, and interpret reports to support their project needs.
  5. Recap and summarize key concepts learned throughout the workshop.

Schedule

Start Date End Date Days Times
10/26/24 10/26/24 Saturday 9:00a - 5:00p
12/7/24 12/7/24 Saturday 9:00a - 5:00p
1/7/25 1/9/25 T W R 7:00a - 9:40a

Objectives

  1. Install and set up Vector PREEvision, navigate its user interface, and manage projects effectively.
  2. Create and manage project requirements within PREEvision and apply basic modeling techniques, including the use of UML/SysML diagrams.
  3. Design detailed E/E architectures, create and manage function networks, and develop effective communication designs and network topologies.
  4. Implement variant management strategies and integrate safety and security concepts into their PREEvision projects, with an introduction to AUTOSAR.
  5. Conduct advanced analysis and validation of E/E systems and create customized reports that align with specific project needs.
  6. Utilize scripting and automation techniques to streamline processes within PREEvision and customize workflows to enhance project efficiency.
  7. Integrate PREEvision with other tools and systems, and apply advanced scripting and API usage to extend the functionality of the software.
  8. Demonstrate their learning through real-world case studies, hands-on exercises, group projects, and final presentations, and will effectively address advanced topics in a Q&A session.

Schedule

Start Date End Date Days Times
10/8/24 10/17/24 T W R 3:00p - 5:40p
11/9/24 11/18/24 T W R 7:00p - 9:40p
1/7/25 1/16/25 T W R 7:00a - 9:40a

Objectives

  1. Install and set up Vector PREEvision on their systems.
  2. Navigate the Vector PREEvision user interface, utilizing its features to enhance productivity.
  3. Create and manage projects within PREEvision, ensuring organized and efficient project workflows.
  4. Handle and manage project requirements within PREEvision, ensuring alignment with project goals.
  5. Apply basic modeling techniques in PREEvision, including the use of UML/SysML diagrams, to accurately represent system architectures.
  6. Design detailed E/E architectures, incorporating function networks and communication designs with appropriate network topologies.
  7. Implement variant management strategies and integrate safety and security concepts into PREEvision projects, including an understanding of AUTOSAR integration.
  8. Perform advanced analysis and validation of E/E systems and create custom reports tailored to specific project needs.
  9. Utilize scripting and automation techniques within PREEvision to streamline processes and customize workflows.
  10. Apply knowledge through real-world case studies, hands-on exercises, and group projects, culminating in final presentations that demonstrate a comprehensive understanding of key concepts

Schedule

Start Date End Date Days Times
1/7/25 2/6/25 T W R 7:00a - 9:40a

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