;*****************************************************************
;* ECE 470 - Lab 2 - Part A 
;* Name: PUT_YOUR_NAME_HERE!
;*****************************************************************

; export symbols
            XDEF Entry, _Startup            ; export 'Entry' symbol
            ABSENTRY Entry        ; for absolute assembly: mark this as application entry point

; Include derivative-specific definitions 
		INCLUDE 'derivative.inc' 

ROMStart       EQU  $4000  ; absolute address to place my code/constant data
VarDataSection EQU  (RAMStart+$200)  ; a place to put variables and data

            ORG VarDataSection  
; variable/data section
Largest  ds 1 
Smallest ds 1
R1       ds 1           
R2       ds 1 
R3       ds 1
; this defines the segments for hex values 0-F starting with 0
SSEGTBL  dc.b $3F,$06,$5b,$4f,$66,$6d,$7d,$07,$7F,$67,$77,$7C,$39,$5e,$79,$71 
; this allocates 16 bytes of memory for our array
ARRAY    ds 16     
; code section
            ORG   ROMStart     ; Originate data at address ROMStart
                                         
Entry:
_Startup:                         
            LDS   #RAMEnd+1       ; initialize the stack pointer
 ; show FFFF on the 7 segment display to show that it is working
         movb #$FF, DDRP          ; set Port P to be all output
         movb #$FF, DDRB          ; set Port B to be all output
         movb #$00, PTP           ; turn all 7 segs on
         movb (SSEGTBL+$F), PORTB ; set 7 seg data to show $F
 ;******* This is where you place your code *******************
     


     ; loop forever
     infinite:
	 jsr READ_SW
         bra infinite

;-------- READ_SW
; Read the 8-bit value of the toggle switches
; - value read is stored in register A
; Side Effects: 
; - A
READ_SW
         movb #0,DDRH
         ldaa PTH
         rts
         
;-------- DISPLAY_LOWER
; Display an 8-bit number on the lower 7-Seg LED displays
; - register A contains the 8-bit value to be displayed.
; Side Effects:
; - no registers are modified
DISPLAY_LOWER
        movb #$FF, DDRP
        movb #$FF, DDRB
        pshx
        psha
BACK    
    	  pula
    	  psha
    	  lsra
    	  lsra
    	  lsra
    	  lsra
    	  ldx #SSEGTBL
    	  leax a,x
    	  ldaa 0,x
    	  STAA PORTB
    	  movb #$0B, PTP ; middle right 7 seg
    	  JSR DELAY

    	  
    	  pula
    	  psha
    	  anda #$0F 
    	  ldx #SSEGTBL
    	  leax a,x
    	  ldaa 0,x
    	  STAA PORTB
    	  movb #$07, PTP ; right most 7 seg
    	  JSR DELAY
    	  
    	  movb #0, PORTB    ; zero out the display before leaving
        pula
        pulx
        rts
         
;-------- DELAY
; Delay for 1 millisecond
; Side Effects:
; - no registers are modified
DELAY

        PSHA            ;Save Reg A on Stack
        LDAA    #1
        STAA    R3
;--10 msec delay. The D-Bug12 works at speed of 48MHz with XTAL=8MHz on Dragon12+ board
;Freq. for Instruction Clock Cycle (and Bus Cycle) is 24MHz (1/2 of 48Mhz).
;(1/24MHz) x 10 Clk x240x10=1 msec. Overheads are excluded in this calculation.
L3:     LDAA    #10
        STAA    R2
L2:     LDAA    #240
        STAA    R1
L1:     NOP         ;1 Intruction Clk Cycle
        NOP         ;1
        NOP         ;1
        DEC     R1  ;4
        BNE     L1  ;3
        DEC     R2  ;Total Instr.Clk=10
        BNE     L2
        DEC     R3
        BNE     L3
;--------------        
        PULA         ;Restore Reg A
        RTS
;-------------------